David Shim

David Shim

Hui Sub (David) Shim

PhD Student in Electrical Engineering, Stanford University

About Me

I am a second-year PhD student in Electrical Engineering at Stanford University, advised by Professor Philip Levis in the Stanford Information Networking Group (SING). My research focuses on rethinking how memory systems interface with CPUs and accelerators to overcome the memory wall as part of the Stanford Differentiated Access Memories (DAM) Project.

Before Stanford, I spent 9 years at Samsung Electronics. As a firmware engineer and associate architect, I developed enterprise solid-state drives used worldwide and contributed to products such as the world’s first PCIe Gen5 enterprise SSD and the world’s first 32TB SAS enterprise SSD.

Current Research

Flow-Based Addressing for SmartNICs I developed and implemented a flow-based addressing abstraction that gives CPUs a contiguous, byte-addressable view of each flow’s bytestream without copying packets into new buffers. Using a flow translation table, a custom DMA engine, and a per-core flow cache, this design reduces redundant DRAM traffic and improves throughput. An FPGA prototype demonstrated a 67% reduction in DRAM traffic and a 52% improvement in throughput, sustaining line-rate processing.

Memory Systems Beyond DRAM and Flash with CXL I am exploring how Compute Express Link (CXL) can integrate emerging memories such as ReRAM, MRAM, and PCM into mainstream systems. CXL enables the operating system to directly optimize for each device’s unique latency, endurance, and persistence profile, opening the door to new abstractions in memory management and richer OS-level tiering strategies. This approach moves the memory hierarchy beyond the simple DRAM/flash divide into a more flexible, multi-dimensional design space.

 

Publications and Achievements

STM: Improving the Reliability of SSD through Selective Trim Manager Samsung Best Paper Contest, 2022 (First Author)

  • Proposed dynamic shutdown and selective trim managers to mitigate NAND flash wear-out during shutdowns and large trim operations.
  • Integrated into end products, reducing metadata wear-outs by over 25% under normal workloads and eliminating worst-case failure scenarios.

CES Innovation Award – World’s First PCIe Gen5 Enterprise SSD (PM1743) Consumer Electronics Show, 2022

  • Pioneered the Partial DRAM solution, replacing portions of DRAM cache with optimized NAND flash to overcome physical capacity and cost limitations.
  • Devised the “Dirty Cache Program Scheme,” which minimized unnecessary flash programs by storing only dirty metadata.
  • Enabled enterprise SSDs to scale beyond 32TB capacity while delivering significant cost savings.

President’s Award – World’s First 32TB SAS Enterprise SSD (PM1643) Samsung Electronics, 2019

  • Reduced metadata latency by 30% and improved throughput by 24% through metadata block optimization and task segmentation.
  • Defined the device’s endurance model (3 DWPD × 5 years) and minimized metadata overhead to maximize usable NAND blocks.
  • Recognized for advancing system performance and reliability in enterprise storage.

 

Industry Experience: Samsung Electronics Memory Division

Senior Software Engineer & Associate Architect (2023–2024)

  • Developed firmware for NVM Express enterprise solid-state drives supplied to Oracle, Dell EMC, IBM, and HP
  • Served as associate architect in defining new modules for metadata management and open time optimization
  • Focus: metadata management, open time optimization, NAND flash exception management, power-loss protection

Software Engineer (2016–2023): 

  • Graduated an intensive 16-month training program designed to provide comprehensive knowledge equivalent to an undergraduate degree in Electrical and Computer Engineering and received the best trainee award
  • Developed firmware for NVM Express and SAS enterprise solid-state drives supplied to Dell EMC, IBM, and HP

 

Teaching and Academic Experience

  • Teaching Assistant, UT Austin – Information, Risk, and Operations Management (2012) TA for Foundations of Information Technology Management (MIS 302F), a course with 750+ undergraduates. Provided offline and online office hours, mentoring students across business and engineering disciplines.
  • Research Assistant, UT Austin – Economics Department (2011–2012) Analyzed consumer behavior among college students and published a thesis on the role of technology in improving K-12 education in developing countries.
  • Supplemental Instruction Leader, UT Austin – Microeconomics (2010–2011) Led weekly review sessions for Introduction to Microeconomics (ECO 304K), a course with 750+ students, and contributed to program assessment through quantitative analysis.

 

Coursework

  • CS: Machine Learning (CS229), Formal Methods for Computer Systems (CS357S)
  • EE: Digital System Design (EE108), Digital Systems Architecture (EE180), Computer Systems Architecture (EE282), Parallel Processing Beyond Multicore (EE382A), Semiconductor Memory Devices and Circuit Design (EE309A)

 

Skills

  • Programming: C/C++, Python, Java, Verilog, High-Level Synthesis, ARM Programming
  • Firmware & Systems: Flash Translation Layer, Metadata Management, NAND Flash Exception Management, NVMe Gen4/5, SAS, Lauterbach Trace32
  • Languages: English (Bilingual), Korean (Native), Chinese (Elementary)

 

Contact

Stanford Email: hsshim (at) stanford (dot) edu
Samsung Email: hui (dot) shim (at) samsung (dot) com
[LinkedIn][cv]

Last Update: Oct. 14, 2025